[sles-beta] Intel_Idel - Apci_Idel - Slow Wall Clock time SP1 to SP2 what about SP3?

Sascha Wehnert swehnert at suse.com
Wed Mar 20 10:20:58 MDT 2013


Hi Loïc,

On 03/20/2013 04:41 PM, LOIC DEVULDER wrote:

> I have found this TID concerning the slow wall clock problem:
> https://www.suse.com/support/kb/doc.php?id=7011982
>
> But be careful, this TID is not correct: “intel_idle_max_cstate=0” is
> not the only option needed! “Processor.max_cstate=0” is also needed (I
> have made test).

For each TID in our knowledge base you have the possibility to leave 
feedback which will get routed to the author. Please use the link at the 
bottom "Did this document solve your problem? Provide Feedback" to do 
so, we always appreciate feedback to the documents we release.

I checked back with the author and he suggested to open a service 
request so we can investigate this in mode depth.

[...]

Kind regards
Sascha Wehnert
-- 
Sascha Andree Wehnert, Technical Support Engineer
Email: swehnert at suse.com

Novell GmbH, Nördlicher Zubringer 9-11, 40470 Düsseldorf
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer
HRB 202401 (AG München)


More information about the sles-beta mailing list